In modern semiconductor device fabrication, after the devices are created, for example, transistors, at the so-called “Front-End-Of-Line (FEOL),” electrical connections to the devices are made, also known as “metallization,” at the so-called “Back-End-Of-Line (BEOL).” The metallization process includes filling various vias with a conductive material, typically, metal. However, at various points in via creation and metal filling, a number of defects can unintentionally be introduced, affecting the end-use reliability of the connections using the metal-filled vias.